This invention relates to a method and apparatus for crystallizing amorphous films into polycrystalline films and, more particularly, to an electrostatic printing method and apparatus for selective deposition of catalyst metals to achieving such selective crystallization. This invention also relates to a method and apparatus for forming metal silicide regions on amorphous/poly-Si films or Si wafers and, more particularly, to an electrostatic printing method and apparatus for selective deposition of metals of the metal silicides to achieving such selective silicidation.
Large area amorphous silicon layers are widely used to make the transistors used for flat panel display devices. Indeed the most widely used flat panel display, i.e., the active matrix liquid crystal display (AMLCD), derives its name from an active matrix of transistors that are arranged in both the X and Y directions. A transistor made from amorphous silicon is placed at each picture element (pixel) in each color for a color display (red, green, and blue).
Transistors made from amorphous silicon exhibit low performance characteristics (compared to those made from single crystal silicon), with low carrier mobility being a determining property. Researchers have recognized that converting amorphous silicon to poly crystalline silicon (poly-Si) will enhance performance considerably, even to a significant fraction of the performance of single crystal silicon, the material from which all integrated circuits are made.
Studies of poly-Si thin film transistors have concentrated on methods for reducing their fabrication costs, either by reducing the transistors"" processing time or by lowering the processing temperatures. The latter effect is important since it allows the usage of less expensive substrates for the transistor arrays, e.g., glass, plastic, etc. For instance, Czubatyj et al. in xe2x80x9cLow-Temperature Polycrystalline TFT on 7057 Glassxe2x80x9d, IEEE Electron Device Letters, Vol. 10, pages 349-351, 1989, demonstrates that polysilicon thin film transistors can be fabricated on 7059 glass substrates using relatively low temperature furnace annealing for crystallization. However, the crystallization process takes longer than 75 hours and is therefore not practically applicable.
Poly-Si films can be deposited, deposited and recrystallized, or deposited in the amorphous (xcex1-Si) form and then crystallized into poly-Si films. There are three principal crystallization processes: furnace annealing, rapid thermal process (RTP) and laser annealing. The first two are solid phase crystallization techniques, while the third is a liquid phase crystallization technique. Although reported laser annealing techniques have the potential for effecting low temperature crystallization, laser crystallization suffers from the need to raster the laser beam; raising throughput issues. Laser annealing also exhibits other difficulties, e.g. reproducibility, uniformity and peel-off. The most commonly used methods for producing large grain poly-Si films are furnace annealing of xcex1-Si films at temperatures of at least 600xc2x0 C., with very long processing times (16-30 hours or longer for xcex1-Si films) or the RTP approach (e.g., 700xc2x0 C./5 mins).
In xe2x80x9cLow Thermal Budget Poly-Silicon Thin Film Transistors on Glassxe2x80x9d, Japanese Journal of Applied Physics, Vol. 30, pages L269-I,271, 1991, it was demonstrated that thin film transistors can be fabricated on poly-Si films made by the crystallization of pre-cursor xcex1-Si films. Those polycrystalline films were obtained by a rapid thermal annealing of the precursor films for five minutes at 700xc2x0 C. on Corning 7059 glass substrates.
In U.S. Pat. No. 5,147,826 to Liu et al., it was shown that a thermal anneal procedure at 700xc2x0 C. (for converting xcex1-Si to poly-Si) can be reduced to a range of from 550xc2x0 C. to 650xc2x0 C. This improvement is accomplished by depositing a thin discontinuous film of a nucleating site forming material over an already deposited layer of xcex1-Si. The xcex1-Si film is then rapidly thermally annealed, with the nucleating site forming material enabling crystallization of the underlying xcex1-Si at temperatures lower than theretofore reported.
Liu et al. also report in the ""826 patent that xcex1-Si can be selectively crystallized by depositing the nucleating site performing material in a pattern thereon and subsequently subjecting the patternized surface to an anneal procedure. Because the nucleating site forming material is a metal, the treated surface of the subsequently crystallized silicon is not optimal for structures. As a result, additional processing steps are required to allow untreated surfaces to become boundaries for devices to be grown.
In U.S. Pat. No. 5,275,826 of Fonash et al., a fabrication process for polycrystalline silicon thin film transistors is described that commences with a deposition of an ultra-thin nucleating-site forming layer onto the surface of an insulating substrate (e.g., 7059 glass, plastic). Next, an xcex1-Si film is deposited thereover and the combined films are annealed at temperatures that do not exceed 600xc2x0 C. By patterning the deposition of the nucleating site forming material on the glass substrate, the subsequently deposited xcex1-Si film can be selectively crystallized only in areas in contact with the nucleating-site forming material.
Ohtani et al. in U.S. Pat. Nos. 5,585,291, 5,612,250, 5,643,826, 5,543,352, and 5,654,203 describe a solution method for applying a catalyst metal to enhance subsequent xcex1-Si crystallization.
The aforesaid thus clearly indicates that catalysts can be used to reduce the time-temperature thermal budget needed for crystallization of semiconductor materials. For example, catalytic agents like palladium or nickel can be deposited by various techniques like vacuum evaporation or from solution and such catalytic agents can substantially impact the thermal budget. The crystallization time may be shortened to as low as 4 minutes at 550xc2x0 C. by such metal treatments.
Each of the above-cited references has employed some form of photolithographic masking to achieve selective deposition of the catalytic metal on selected parts of a substrate. Such procedures require a number of steps and add to the cost of the ultimate product made thereby.
Accordingly, it is an object of this invention to provide an improved method and apparatus for applying a crystallization catalyst onto an amorphous semiconductor film.
Besides selective area crystallization of an amorphous film, another microelectronic fabrication process of interest involving the selective area application of a metal on an amorphous or polycrystalline Si film or a Si wafer is selective area silicidation. A wide range of noble and refractory metals form compounds with Si called suicides. As in the case of metal-induced crystallization, silicidation requires annealing of the related metal layer in contact with Si. Minimum annealing temperature depends on the silicide to be formed and varies from 400 to 1000xc2x0 C. Silicides exhibit conductivities close to metals (0.1-0.01 S/cm) and in certain applications are preferable to metals where a better chemical stability or lattice match is desired. Applications of suicides include; electrical interconnects, Schottky contacts to form Schottky barrier diodes, gate electrodes in transistors, and source and drain contacts in transistors. As different from metal-induced crystallization, silicidation requires a thicker layer of metal be deposited. This is because, in crystallization, the catalyst layer (which may be pure metal, or a metal containing material) deposited acts as the catalyst or seed layer and does not need to be thicker than a few tens of xc3x85. On the other hand, in applications of suicides as stated above, the silicide layer is required to be at least hundreds of xc3x85. Hence, a metal layer of similar thickness (hundreds of xc3x85) is needed which is to be consumed during silicidation process. As in the case of selective area crystallization, fabrication of silicide structures or patterns on a Si surface requires the metal layer to be patterned. Conventionally, this procedure is also performed by photolithography and requires a number of steps increasing the processing cost.
Accordingly, it is also an object of this invention to provide an improved method and apparatus for applying a metal onto a Si surface (Si wafer, amorphous/poly-Si film) with the purpose of obtaining silicide regions.
The process of the invention is simple, low cost and is much like a copy machine and enables the printing of a toner for the purpose of selective area crystallization or silicidation, preferably on a silicon layer that resides on a low cost substrate. Glass, plastics and metal foils covered by an insulating layer can be used. The patterning and image registration can be performed to high accuracy using the process of the present invention.
In the case of crystallization or silicidation of thin films according to the present invention, the process sequence may be modified by applying the catalyst-containing or metal containing toner to the substrate prior to semiconductor film deposition and annealing of the semiconductor film. The semiconductor film can be a material other than Si, e.g., carbon, germanium and alloys thereof.
The present invention is directed to a method for applying metallic toner onto an amorphous semiconductor layer with the objective of selective area crystallization, the method comprising the steps of:(a) exposing a photo-sensitive surface to cause exposed areas of the surface to crosslink and exhibit an increase in resistivity in comparison with unexposed areas of the photo-sensitive surface; (b) charging the photo-sensitive surface, the exposed areas of the photo-sensitive surface retaining a charge longer than the unexposed areas; (c) applying a toner to the photo-sensitive surface, the toner attracted by retained charge on the exposed areas; (d) juxtaposing the photo-sensitive surface toned in step (c) to a layer of amorphous semiconductor and applying an electric field therebetween to cause the toner that is adherent to the photo-sensitive surface to migrate to the amorphous semiconductor layer; and (e) annealing the toned amorphous semiconductor layer to enable formation of polycrystalline semiconductor only in areas where the toner is adherent. In another embodiment of the invention, step (d) further comprises interposing a nonconductive fluid between the photo-sensitive surface and the silicon surface prior to applying the electric field.
In one embodiment of the invention, the photo-sensitive surface comprises a material such as epoxy cationic, acrylic free radical, and photosensitive polyimide.
In another embodiment of the invention, the toner contains a metal (a) chemically, wherein the toner is a compound or solution of the metal; (b) physically, wherein the metal is contained in the toner as metal particles; or (c) both. Preferably, the metal contained in the toner is in a form selected from the group consisting of metal complex, pure metal particle, coated metal, and organometallic compound. More preferably, the toner is a material selected from the group consisting of: a resin with metal particles, an organosol with metal particles, a metallo-organic decomposition compound, and a metallo-organic decomposition compound with metal particles. The metal or the metal particle is comprised of a metal selected from the group consisting of: palladium, silver, tin, nickel, platinum, chromium and mixtures thereof.
In a further embodiment of the invention, the amorphous semiconductor layer comprises a material such as silicon, germanium, silicon-germanium, silicon-carbide, cadmium selenide, and indium antimonide. Preferably, the amorphous semiconductor layer is disposed on a substrate, which comprises at least one material, such as silicon, metal, glass, or plastic.
The present invention is also directed to a method for applying metallic toner onto an amorphous semiconductor layer with the objective or selective area crystallization, the method comprising the steps of: (a) charging a photo-sensitive surface; (b) exposing the photo-sensitive surface to an optical image or a digitally addressed beam to produce a latent image of charges on the photo-sensitive surface; (c) applying a toner to the photo-sensitive surface, the toner attracted to the charged areas of the photo-sensitive surface; (d) juxtaposing the photo-sensitive surface toned in step (c) to a layer of amorphous semiconductor and applying an electric field therebetween to cause the toner that is adherent to the photo-sensitive surface to migrate to the amorphous semiconductor layer; and (e) annealing the toned amorphous semiconductor layer to enable formation of polycrystalline semiconductor only in areas where the toner is adherent. In an embodiment of the invention, the photo-sensitive surface comprises a material such as organic photoreceptor surface, arsenic triselenide, selenium, and silicon. In another embodiment of the invention, the exposing of the photo-sensitive surface in step (b) is to an optical image or digitally addressed beam, such as, a LED or laser.
The present invention is further directed to a method for the formation of silicide on a silicon surface comprising the steps of: (a) exposing a photo-sensitive surface to cause exposed areas of the surface to crosslink and exhibit an increase in resistivity in comparison with unexposed areas of the photo-sensitive surface; (b) charging the photo-sensitive surface, the exposed areas of the photo-sensitive surface retaining a charge longer than the unexposed areas; (c) applying a toner to the photo-sensitive surface, the toner attracted by retained charge on the exposed areas; (d) juxtaposing the photo-sensitive layer surface toned in step (c) to a silicon surface and applying an electric field therebetween to cause the toner that is adherent to the photo-sensitive surface to migrate to the silicon surface; and (e) annealing the toned silicon surface thereby enabling formation of silicide only in areas where the toner is adherent. In accordance with still another embodiment of the invention, step (d) further comprises interposing a nonconductive fluid between the photo-sensitive surface and the silicon surface prior to applying the electric field.
In one embodiment of the above invention, the photo-sensitive surface comprises a material such as epoxy cationic, acrylic free radical, and photo-sensitive polyimide. The silicon surface for the above method can be amorphous, polycrystalline, or single crystalline. In an embodiment of the invention, the photo-sensitive surface comprises a material such as organic photoreceptor surface, arsenic triselenide, selenium, and silicon.
In an embodiment of the invention, the toner contains a metal as detailed above. Preferably, the metal or metal particle is a metal of the desired metal-silicide including: aluminum, cobalt, chromium, hafnium, iron, magnesium, molybdenum, nickel, niobium, palladium, platinum, tantalum, titanium, tungsten, zirconium and mixtures thereof.
In another embodiment of the invention, the silicon surface is an amorphous or polycrystalline silicon thin film disposed on a substrate. Preferably, the substrate comprises at least one material, such as, silicon, metal, glass, or plastic.
The present invention is still further directed to a method for the formation of silicide on a silicon surface comprising the steps of: (a) charging a photosensitive surface; (b) exposing the photosensitive surface to an optical image or a digitally addressed beam to produce a latent image of charges on the photosensitive surface; (c) applying a toner to the photosensitive surface, the toner attracted to the charged areas of the photosensitive surface; (d) juxtaposing the photosensitive layer surface toned in step (c) to a silicon surface and applying an electric field therebetween to cause the toner that is adherent to the photo-sensitive surface to migrate to the silicon surface; and (e) annealing the toned silicon surface thereby enabling formation of silicide only in areas where the toner is adherent. In an embodiment of the invention, the photo-sensitive surface comprises a material selected from the group consisting of: organic receptor surface, arsenic triselenide, selenium, and silicon. In one embodiment of the invention, the exposing of the photo-sensitive surface in step (b) is to an optical image or digitally addressed beam, such as, a LED or laser.
This invention utilizes electrophotography to apply a crystallization catalyst to an amorphous semiconductor layer. The catalyst is subsequently employed to convert areas of the amorphous semiconductor layer to discrete, defined polycrystalline regions.
This invention also utilizes electrophotography to apply a metal or metal containing material to a Si surface. The metal or metal containing material is subsequently employed to convert areas of the Si surface to discrete, defined metal-silicide regions.